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Overview of Hardware Parameters
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MLK-H3-CZ08P hardware parameters
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SOC Model
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MLK-H3-CZ08P hardware parameters
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Main parameters of ARM
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Cortex-A9 dual core clock frequency800MHz
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Model
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XC7Z100FFG900-2I
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XC7Z045FFG900-21
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XC7Z035FFG900-21
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Architecture
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Kintex7
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Kintex7
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Kintex7
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Speed level
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-2
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-2
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-2
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Logic Cells
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444K
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350K
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275K
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LUTs
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277400
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218600
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171900
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Block RAM(#36kb Blocks)
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26.5Mb
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19.1Mb
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17.6Mb
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DSP(DSP slices)
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2020
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900
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900
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Flip-flops
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554800
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437200
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343800
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XADC
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Not exported, cannot be used
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Not exported, cannot be used
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Not exported,cannot be used
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GTX Transceivers
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16 pairs
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16 pairs
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16 pairs
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Core power supply
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1.0V power supply with a maximum output of 24A
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PS DDR
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DDR3L 1GB 1066MHz*32bits
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PL DDR
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DDR3L 2GB 1600MHz*64bits
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EMMC
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16GB
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SD card
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1-channel TF card interface
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FLASH
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256Mbit QSPI-Flash
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PS crystal oscillator
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33.33333MHz (on core module)
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PL crystal oscillator
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Differential 100MHz (on core module)
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FMC Expansion Port
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Can connect various FMC modules of Xilinx. Contains 36 pairs of differential signals and a set of GTX transceivers MGT109BANK.
Differential signals support voltage ADJ, which can be adjusted using jumper caps |
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FEP Expansion Port
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FEP high-speed expansion interface, HR BANK, 96GPIO/48 differential, adjustable voltage ADJ2 using jumper cap
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GTX crystal oscillator
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A programmable clock controlled by a dip switch, connected to MGT111 REFCLK1 and MGT110 REFCLK1 2 Programmable clock controlled by
IIC, connecting MGT109 REFCLK1 and MGT110 REFCLK0 (default not soldered) |
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SFP+
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2-channel SFP+interface, single channel supports up to 10.3125Gbps, using MGT110 BANK
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PCIE interface
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PCIE2.0 X8 uses MGT111BANK and MGT112BANK
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SATA
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2 channel , Using MGT110 BANK
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Gigabit Ethernet
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PS end 1 Gigabit Ethernet RJ45 interface, PL end 1 Gigabit Ethernet RJ45 interface
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HDMI
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1 HDMI output, supports DVI1.0/HDMI 1.0 protocols, maximum output 1080@60fps
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USB 2.0
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1 USB 2.0 interface, providing jumper cap to support USB OTG and USB host
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USB serial port
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Bottom board 1 PS end USB to serial port, MiniUSB interface
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EEPROM
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Route 1 24LC02
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RTC
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Route 1 DS1337
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Button
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3
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LED
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5
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JTAG interface
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1 route, use downloader for debugging and downloading
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